1. Field of the Invention
The present invention relates to a ring oscillator variable in oscillation frequency and a phase locked loop (PLL) circuit using the ring oscillator.
2. Description of the Related Art
In the process of reproducing digital data recorded on a recording medium, e.g., a magnetic tape or a magneto-optical disk, a reproducing clock for extracting bits (so-called bit clock signal) is required to extract reproduced data from information read out from the recording medium. PLL circuits are generally used for the purpose of generating such a clock synchronized with information read out.
Conventionally, PLL circuits are ordinarily formed as analog circuits. Recently, however, the digitization of processing in PLL circuits has been advanced. Digital PLL circuits are realized by digitizing processing in a phase error detection section, in an error signal filtering processing section and in a clock oscillation circuit section.
However, it has been difficult to form digital PLL circuits because of the difficulty in forming a digital clock oscillation circuit section.
For example, an oscillation circuit is frequently used in which a master clock having a frequency sufficiently higher than that of a reproducing clock is prepared, and in which the master clock is suitably divided to form the reproducing clock. If the frequency of the reproducing clock is higher, the frequency of the master clock must be increased correspondingly. It is considered that the necessary frequency of the master clock is, ordinarily, several times to several tens of times higher than the frequency of the reproducing clock. Therefore, there is a limit to frequencies usable as the frequency of the master clock if the frequency of the reproducing clock is increased. For this reason, it is difficult to form digital PLL circuits.
Under these circumstances, there is a demand for digital oscillators which are oscillators capable of controlling the oscillation frequency by a digital code unlike analog voltage controlled oscillators having an oscillation frequency that is voltage-controlled, and which are capable of obtaining an oscillation output without dividing the master clock frequency.